Lift-off is a subtractive process used in wafer fabrication of Micro-Electrical-Mechanical-Systems (MEMS) devices to pattern deposited films, often metal, that are challenging to dry etch. To achieve a successful lift-off, the lift-off process begins by depositing and then patterning a photoresist masking material onto a silicon wafer using photolithographic techniques. An important characteristic of the photoresist is undercutting the resist sidewalls after developing, protecting them from being coated with metal during deposition. After deposition, the photoresist and metal layer is removed via solvent. The purpose of our research is to allow for a more varied range of fabrication using positive tone photoresist. Negative tone photoresist is typically used for this lift-off process because after development, this resist naturally forms the desired undercut. Alternately, positive tone photoresist is characterized by a tapered sidewall that is difficult to not coat with the metal film layer, making the removal step via solvent problematic. We hypothesized an advantageous undercut is possible with positive tone photoresist using a white light diffuser that would allow light to enter at angles through our mask during the exposure step. We evaluated resist undercut using the Nikon microscope and resist/metal sidewall characteristics using the Scanning Electron Microscope. We will assess the new resist exposure technique using both line-of-sight evaporation (physical vapor deposition in which a target material’s atoms precipitate into solid form, when heated up under high vacuum, coating everything in the vacuum chamber) and sputtering (metal deposition involving particle ejection of ions) to deposit a thin metal film. We anticipate evaporated metal to lift-off easily with the new technique, which indicates a crowning demonstration of success.

Atomic Layer Deposition (ALD) is a process whereby thin films of a material, ranging from dielectric materials to metals, are deposited onto a substrate. ALD reactions operate using two vapor phase chemical precursors that react with the substrate material sequentially one at a time, slowly forming the thin film. Because of the sequential nature of ALD, the process is self-limiting and offers exceptional control of thin film thicknesses, film composition, and high conformity on high aspect ratio features, such as trenches and sidewalls, making ALD an extremely useful process for the fabrication of semiconductor devices. The purpose of this project was to develop processes and refine process parameters for thin film deposition using an industry grade ALD machine. Thin films were deposited onto silicon substrates with etched features. The films were then examined and characterized using ellipsometry and sidewall conformity was measured using a scanning electron microscope.  This data was used to refine processes and parameters that were then employed by research staff and industry users in the fabrication of semicondctor devices.  Overall, this data can be employed by the semiconductor industry to better understand this process and utilize it to manufactor silicon devies with  greater uniformity and efficiency.

The damascene process is an additive manufacturing technique commonly used in the nanofabrication industry to produce semiconductor devices. This process utilizes deposition and patterning of successive layers to produce interconnected copper patterns separated by interlayer dielectric. The goal of this project was to implement the damascene process to develop and refine methods at the Washington Nanofabrication Facility (WNF) for manufacturing multi-layer devices. For our purposes, we constructed an integrated passive device (IPD) that contains capacitors, resistors, and inductors. We utilized basic nanofabrication tools in our damascene process including deposition, photolithography, etching, electroplating, metrology, and polishing tools. In fabricating this method at the WNF, our main objective was to produce a highly repeatable device with structural integrity. The main challenges accompanied with this involved generating a successful etch on all three layers of the IPD and optimizing polishing conditions. Cross sections of the final product were analyzed in order to demonstrate that the layout expected from the process was achieved. The procedure we developed can be applied to future multi-layer damascene processes at the WNF. Multi-layer devices are significant in the semiconductor industry as they allow for high packing density and an increased variety of circuit configurations in a compact device.

Isolation of silicon (Si) is a microfabrication technique used to isolate selected areas of silicon from interacting with each other using silicon dioxide (SiO2). This processes is done to separate metal oxide semiconductor (MOS) transistors from each other. MOS is a specific way of fabricating devices that is low cost and easy to integrate. It is a very important step in creating integrated circuits. Circuits must be isolated from each other to perform correctly. The smaller the space to separate the circuits, the more circuits can be placed on a device or the smaller the device can be. There are currently two different techniques for isolating silicon. Local Oxidation of Silicon (LOCOS) is the more widely used technique versus the more modern attempt, Shallow Trench Isolation (STI) that is becoming more popular this decade but has many more process steps. Each technique has its pros and cons. LOCOS is a method in which a thin layer of SiO2 is deposited on a wafer, pad oxide, and then a layer of silicon nitride (SiN) is also then deposited as an etch barrier for later stages.Through photolithography processes, including photoresist application, aligning and exposure, a pattern is transferred onto the wafer. The wafer is then put through a plasma etcher to create space for more oxide. Next is for the thermal oxide to be grown, creating an unfortunate “birds beak” that limits feature size of the circuit . The final step is the removal of the remaining nitride and only oxide is left. I am creating a completely new process flow along with a new wafer mask for photolithography to cater to the labs existing equipment, varying different variables and attempting to optimize the technique for the lab. In doing so I will be our lab’s capabilities are tested to see how efficient it is to run the process in the facility and how accurate the results are. The results will be used to determine if in the future certain design features will be able to be implemented in and then fabricated in the lab. Also the question of the techniques viability is answered, if it is still usable and in tolerance with different standards.

Deep reactive-ion etching (DRIE) is a highly anisotropic etch used for creating high aspect ratio and steep sidewall etch features in silicon wafers. The etch characteristics of DRIE are desirable for a variety of microelectromechanical systems (MEMS) applications such as through silicon vias for integrated 3 dimensional circuits and MEMS based microneedles. A common problem while trying to etch smaller features using DRIE is that the difficulty of transporting etch gasses and etch byproducts in and out of the deep trenches decreases silicon etch rates. This causes the silicon-to-mask selectivity to decrease with feature size as the etch rate for silicon decreases while the etch rate for the photoresist mask remains unchanged. By manipulating the process variables (including pressure, deposition/etch times, and temperature) and using an oxide hard mask instead of photoresist, we intend to improve the selectivity for DRIE etches of smaller features. Standard recipes are used to deposit a uniform oxide layer on the wafer, then a photoresist mask is used to etch through the deposited oxide. After stripping the photoresist mask, an oxide hard-mask is left patterned on the wafer. The silicon wafers are then etched using the SPTS-DRIE & Oxford-DRIE tools, which utilize alternating steps of C4F8 passivation and SF6 etching, known as the Bosch process, to create the high aspect ratio trenches. The scanning electron microscope (SEM) will be used to characterize the depths and sidewall profiles of trenches containing features of all sizes, while a profilometer will be used to find the depths of large-featured trench depths. Additionally, the SEM will be employed to determine differences in sidewall topography compared to topography achieved with photoresist. The goal is to obtain an etch profile with high selectivity using oxide hard masks, while still maintaining sidewalls close to 90° and typical etch characteristics.

Natural proteins often assemble into various complex geometric structures based on their interactions with each other. These structures can hold and transport "cargo" as well as display antigens, making them extremely useful in vaccine design. The King Lab at the University of Washington uses the way these proteins assemble to develop computational models that help them design novel self-assembling protein cages, or nanoparticles. These nanoparticles are then used to develop vaccines or treatments for diseases. Components of the designed protein cage can be modified and expressed individually before being assembled together into the nanoparticle. I am working on stabilizing one of these protein cages known as T33DN2, so it can be used towards creating a vaccine. T33DN2 is a tetrahedral cage comprised of two trimeric proteins known as T33DN2A and T33DN2B. When expressed individually through E.coli, DN2A is produced in a soluble form while DN2B is produced in a mostly insoluble form. T33DN2 is currently an unstable cage, as only the A component is expressed solubly. Soluble proteins are generally more stable and thus easier to work with than their insoluble counterparts. To increase the solubility of DN2B, I have been making mutations to specific amino acids in the DNA that produces this protein, as well as expressing and purifying this component to determine its stability.

Enteric diseases, or diseases of the Gastrointestinal (GI) tract, remain one of the most prevalent killers of children in sub-Saharan Africa. The most practical way to prevent such diseases is through vaccination, but antigens for enteric diseases need to be delivered directly to the GI tract to be most efficient, making vaccination difficult. Recent studies by the von Adrian group at Harvard University have found that both T and B cells are reprogrammed to home to the GI tract when they encounter retinoic acid, a metabolite of vitamin A. The King Lab at the University of Washington is working to develop a novel vaccine candidate using recently developed self-assembling protein nanoparticles, that can simultaneously package all-trans retinoic acid (ATRA) and multivalently display enteric antigens. Previous work has suggested that two cystine mutations to Cellular Retinoic Acid Binding Protein I (CRABP-I) create a disulfide bond as a result of the conformational change that CRABP-I undergoes when it binds ATRA. This disulfide bond would essentially lock ATRA into CRABP-I, reducing its dissociation constant in vivo and maintaining the gut-homing properties of the nanoparticle post-injection. In order to assess the efficacy of these cysteine mutations, I expressed two versions of CRABP-I, the wildtype protein with no cysteine residues, and a version with no cystine residues except for the two that create the disulfide bond. After establishing that these new CRABP-I mutants folded into the approximate shape of wildtype CRABP-I via circular dichroism, I designed and tested new assays that measured free thiol concentrations of each protein after binding ATRA, as well as free ATRA concentration overtime. This data will help us determine whether these two cystine mutations make a significant difference in the ATRA binding quality of CRABP-I, which could improve the immune response generated by our vaccine candidate.